Analog layout design

Category: 2016 , Courses , SSCS Events

The Analog Layout Design course provides a hands-on training that will include the following topics:
CMOS Fabrication Process.

  • Layout interconnect principles and techniques.
  • Floor planning.
  • Connection Techniques
  • Parasitic insertion.
  • Physical Verification Methodologies.
  • Design Rule Checks DRC.
  • Layout vs. Schematic LVS.
  • Parasitic extraction PEX.
  • Electrical rule checks ERC.
  • Advanced Topics.
  • Electrostatic Discharge (ESD) protection.
  • Antenna.
  • Latch Up.
  • Soft ERC connections.
  • DFM design for manufacturability.
  • Electro-migration.

Duration: 8 hours.

there is no prerequisites for this course.

Eng. AbdelRahman El-Taweela.

Instructor Biography:
Eng. AbdelRahman received the B.Sc. degree in Electronics and Communications Engineering from Alexandria University in 2012, his graduation project was about: CMOS design of an LTE frond-end. Now, He is Physical Design Engineer at Silicon Vision. Also, He is M.Sc. student at Ain Shams University his research interest includes: RF Filters, Power Management ICs and New Technology.

Project Details