Recent Advances in VLSI Verification Methodologies

Category: 2016 , SSCS Events

We all know that the Digital ASIC Design process is becoming more and more complicated, but have we ever thought about the impact of this on the demand for ASIC verification? Do you know that the split between ASIC Design and Verification on any given team has reached 45-55 in favor of verification? Do you prefer pure Hardware or Hardware/Software? Do you want to make use of multi-threading, networking concepts in the hardware aspect?